The present invention relates to power conversion apparatus and methods, and more particularly, to power supply apparatus and methods of operating the same.
Traditionally, uninterruptible power supplies (UPSs) largely used analog control techniques to control power conversion circuitry, such as pulse width modulators (PWMs). However, recent years have brought increased use of digital control techniques in UPSs, typically implemented in a microprocessor, microcontroller or digital signal processor (DSP).
A typical UPS may include a closed loop PWM circuit that includes a PWM that generates an AC output voltage from a DC source, e.g., a battery and/or rectifier output. A low pass filter is typically included in the loop at the output of the PWM circuit. The low pass filter may be used to filter out unwanted high frequency components generated by the operation of the PWM and thereby provide a smoothed AC output voltage waveform.
A potential problem with such an output filter is that it may introduce a complex pole in the transfer function of the loop circuit at a frequency that can degrade function of the loop. In particular, such a complex pole can provide sufficient additional phase lag at the unity gain crossover point of the loop such that the loop lacks sufficient phase margin to remain stable in response to step changes in the loading of the UPS or in response to the presence of non-linear loads. Conventionally, analog circuitry has been used to compensate for such a filter pole.